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[转]ARM Pipeline
阅读量:4576 次
发布时间:2019-06-08

本文共 1103 字,大约阅读时间需要 3 分钟。

Add r0, PC, # g_oalAddressTable - (+ 8) instruction,

a lot of people had cprogramdev.com Forum asked,

I answered,

and now actually in my development board technical support group,

also asked, and looks like he does not understand how to say.

In fact, he is caught in a dead end, have to think about their thinking.

In fact, this is agreed in ARM ARM with this pipeline to do is very scientific,

just like our real factory assembly line mode to improve efficiency.

Well, here is ARM7/ARM9/ARM11 or even is the s5pv210 are in line with the wording of the title.

 

The reason is as follows:

R15 (PC) always points to the "fetch" command,

instead of pointing to "perform" instruction or "decoding" command.

In general, it is the habit of the contract,

"the instruction being executed as a reference point called the first instruction,

the PC always points to the third instruction.

When ARM state, each instruction is 4 bytes long,

so the PC always points to the address of the instruction plus 8 bytes of address:

PC = current program execution location +8;

转载于:https://www.cnblogs.com/Proteas/p/3161855.html

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